Process challenges in 0-level packaging using 100μm thin chip capping with TSV

Pham, NgaNgaPhamCherman, VladimirVladimirChermanTutunjyan, NinaNinaTutunjyanTeugels, LieveLieveTeugelsSabuncuoglu Tezcan, DenizDenizSabuncuoglu TezcanTilmans, HarrieHarrieTilmans2021-10-202021-10-202012https://imec-publications.be/handle/20.500.12860/21297Process challenges in 0-level packaging using 100μm thin chip capping with TSVProceedings paper