Shohjoh, TomoyasuTomoyasuShohjohIsawa, MikiMikiIsawaLorusso, GianGianLorussoHoriguchi, NaotoNaotoHoriguchiMertens, HansHansMertensBogdanowicz, JanuszJanuszBogdanowiczDe Bisschop, PeterPeterDe BisschopCharley, Anne-LaureAnne-LaureCharley2026-07-272026-07-2720262708-83401932-5150https://imec-publications.be/handle/20.500.12860/59987Background Lateral gate-all-around (LGAA) device architectures—including nanosheet and forksheet structures—are becoming the dominant transistor platforms for sub-3 nm technology nodes. These architectures introduce multiple buried features such as silicon-germanium (SiGe) layers, dielectric-wall voids, and channel-release interfaces, many of which lie beneath hard-mask or dummy-gate stacks in actual process flows. As a result, the need for subsurface metrology that can access these features prior to or without cross-sectioning has grown substantially. Aim The aim is to isolate and evaluate the intrinsic subsurface-visibility capability of high-voltage critical-dimension scanning electron microscopy (HV CD-SEM). This study investigates its feasibility using nanosheet test structures intentionally prepared without upper hard-mask or dummy-gate layers. Approach Three LGAA-relevant inspection targets were examined: (1) voids within dielectric walls, (2) SiGe lateral recess amounts, and (3) multilayer SiGe residues after channel release. HV CD-SEM images were acquired at elevated landing energies to enhance backscattered-electron (BSE) sensitivity to embedded features. Monte Carlo simulations were performed to interpret voltage-dependent BSE signatures, and selected features were verified by transmission electron microscopy (TEM) or energy-dispersive X-ray spectroscopy (EDX). Results HV CD-SEM successfully visualized dielectric-wall voids, extracted SiGe recess amounts using SE/BSE paired contrast, and detected SiGe residues originating from distinct depths within the nanosheet stack. Recess extraction was applied at 163 sampling locations, enabling wafer-level evaluation of layout-dependent micro-loading effects, whereas TEM cross-sections provided limited but essential reference values. Simulations correctly predicted the voltage-dependent detectability of multilayer SiGe residues, and EDX confirmed Ge-related contrast in the HV CD-SEM images. Conclusions These results show that HV CD-SEM possesses intrinsic subsurface-visibility capability when upper hard-mask and dummy-gate layers are absent, demonstrating feasibility for detecting voids, SiGe recess profiles, and multilayer SiGe residues in nanosheet structures. Extending this approach to fully processed LGAA devices—where upper gate-stack layers remain in place—represents an essentially next step toward establishing HV CD-SEM as a comprehensive inline subsurface metrology technique.engIn-line metrology and inspection for hidden structure of lateral gate-all-around devices enabled by high voltage critical dimension scanning electron microscopyJournal article10.1117/1.jmm.25.1.014002WOS:0017333818000012708-8340