Gate-all-around transistors based on vertically stacked Si nanowires: recent progress in CMOS integration and in advanced inline metrology

Mertens, HansHansMertensRitzenthaler, RomainRomainRitzenthalerMocuta, DanDanMocutaHoriguchi, NaotoNaotoHoriguchi2021-10-252021-10-252018https://imec-publications.be/handle/20.500.12860/31337Gate-all-around transistors based on vertically stacked Si nanowires: recent progress in CMOS integration and in advanced inline metrologyProceedings paper