Full (Vg,Vd) bias space modeling of hot-carrier degradation in nanowire FETs

Vandemaele, MichielMichielVandemaeleKaczer, BenBenKaczerTyaginov, StanislavStanislavTyaginovStanojevic, ZlatanZlatanStanojevicMakarov, AlexanderAlexanderMakarovVaisman Chasin, AdrianAdrianVaisman ChasinBury, ErikErikBuryMertens, HansHansMertensLinten, DimitriDimitriLintenGroeseneken, GuidoGuidoGroeseneken2021-10-272021-10-272019https://imec-publications.be/handle/20.500.12860/34288Full (Vg,Vd) bias space modeling of hot-carrier degradation in nanowire FETsProceedings paperhttps://ieeexplore.ieee.org/document/8720406