Ultrathin (< 4 nm) SiO2 and Si-O-N gate dielectric layers for silicon microelectronics: understanding the processing, structure, and physical and electrical limits

Green, MartinMartinGreenGusev, E. P.E. P.GusevDegraeve, RobinRobinDegraeveGarfunkel, E. L.E. L.Garfunkel2021-10-142021-10-142001https://imec-publications.be/handle/20.500.12860/5321Ultrathin (< 4 nm) SiO2 and Si-O-N gate dielectric layers for silicon microelectronics: understanding the processing, structure, and physical and electrical limitsJournal article