Integrating 8nm Self-Aligned Tip-to-Tip to Enable 4-track Standard Cell Architecture as Scaling Booster

Marien, PhilippePhilippeMarienVega Gonzalez, VictorVictorVega GonzalezChoudhury, SubhobrotoSubhobrotoChoudhuryRadisic, DunjaDunjaRadisicDecoster, StefanStefanDecosterKundu, ShreyaShreyaKunduHermans, YannickYannickHermansKenens, BartBartKenensDe Coster, HanneHanneDe CosterAltamirano Sanchez, EfrainEfrainAltamirano SanchezPeter, AntonyAntonyPeterSepulveda Marquez, AlfonsoAlfonsoSepulveda MarquezJourdan, NicolasNicolasJourdanBatuk, DmitryDmitryBatukRyckaert, JulienJulienRyckaertMurdoch, GayleGayleMurdochPark, SeonghoSeonghoParkTokei, ZsoltZsoltTokei2024-05-232023-08-072024-05-2320232380-632XWOS:001027381700017https://imec-publications.be/handle/20.500.12860/42286Integrating 8nm Self-Aligned Tip-to-Tip to Enable 4-track Standard Cell Architecture as Scaling BoosterProceedings paper10.1109/IITC/MAM57687.2023.10154710979-8-3503-1097-9WOS:001027381700017