Exploring ESD challenges in sub-20-nm bulk FinFET CMOS technology nodes

Chen, Shih-HungShih-HungChenHellings, GeertGeertHellingsThijs, StevenStevenThijsLinten, DimitriDimitriLintenScholz, MirkoMirkoScholzGroeseneken, GuidoGuidoGroeseneken2021-10-212021-10-212013https://imec-publications.be/handle/20.500.12860/22127Exploring ESD challenges in sub-20-nm bulk FinFET CMOS technology nodesProceedings paper