Methodology for building processor design space exploration

Barat, F.F.BaratVander Aa, TomTomVander AaJayapala, MuraliMuraliJayapalaDeconinck, G.G.DeconinckLauwereins, RudyRudyLauwereinsCorporaal, HenkHenkCorporaal2021-10-162021-10-162005https://imec-publications.be/handle/20.500.12860/10059Methodology for building processor design space explorationProceedings paper