In-line electrical metrology for high-k gate dielectrics deposited by atomic layer CVD

De Witte, HildeHildeDe WittePassefort, SophieSophiePassefortBesling, WimWimBeslingMaes, JanJanMaesEason, K.K.EasonYoung, EdwardEdwardYoungRittersma, ChrisChrisRittersmaHeyns, MarcMarcHeyns2021-10-152021-10-152003https://imec-publications.be/handle/20.500.12860/7459In-line electrical metrology for high-k gate dielectrics deposited by atomic layer CVDJournal article