Pattyn, TimTimPattynSun, XiaoXiaoSunBeyne, EricEricBeyneDe Zutter, DanielDanielDe ZutterHuynen, MartijnMartijnHuynenVande Ginste, DriesDriesVande Ginste2026-01-222026-01-222025-08-260018-9480https://imec-publications.be/handle/20.500.12860/58706Accurate modeling of on-chip passive components is vital for reliable integrated circuit (IC) design. However, this is non-trivial due to the inherent heterogeneity of the structures and the wide range of material parameters involved. In this work, we present a single-source boundary integral equation (BIE) for modeling on-chip interconnects and passive elements. To reduce the number of discretization elements—and thus the number of unknowns—we construct a 3-D differential surface admittance (DSA) operator for piecewise homogeneous cuboidal and rectilinear polyhedral objects. Specifically, a novel method is proposed to handle material interfaces efficiently. By combining this new formulation of the DSA operator with the augmented electric field integral equation (EFIE), we obtain a framework that enables accurate modeling and fast broadband impedance extraction of on-chip structures. The proposed approach is validated through several numerical experiments, including important applications such as metal-insulator-metal (MIM) capacitors, and demonstrates excellent agreement with reference solutions while significantly reducing computational cost compared to state-of-the-art solvers.engJournal article10.1109/TMTT.2025.3600958WOS:001565181900001IMPEDANCE BOUNDARY-CONDITIONINTEGRAL-EQUATIONFORMULATION