Vaisman Chasin, AdrianAdrianVaisman ChasinFranco, JacopoJacopoFrancoVan Beek, SimonSimonVan BeekDekkers, HaroldHaroldDekkersKruv, AnastasiiaAnastasiiaKruvRinaudo, PietroPietroRinaudoZhao, YingYingZhaoMatsubayashi, DaisukeDaisukeMatsubayashiPavel, AlexandruAlexandruPavelWan, YiqunYiqunWanTrivedi, KrutiKrutiTrivediRassoul, NouredineNouredineRassoulLi, JieJieLiJiang, YuchaoYuchaoJiangvan Setten, MichielMichielvan SettenSubhechha, SubhaliSubhaliSubhechhaBelmonte, AttilioAttilioBelmonteKaczer, BenBenKaczerKar, Gouri SankarGouri SankarKar2026-04-212026-04-2120242380-9248https://imec-publications.be/handle/20.500.12860/59143We study the impact of the device architecture, channel deposition method, stoichiometry and phase, and AC stress on the BTI of IGZO thinfilm transistors fabricated on 300-mm wafers. Two main conclusions are obtained. First, reliability of IGZO based devices is strongly architecture dependent, and therefore reliability solutions are not universal. Second, top-gate (TG) devices are more severely impacted by the abnormal negative ΔVth during PBTI at T>25∘C, ascribed to a H-doping process, than back-gated (BG) counterparts. Two remedies for the negative ΔVth are identified: In-poor films (In~5%) and AC stress with duty-cycle< <25% do not reveal signs of H-doping process within the experimental time window, and thus are promising for reliable product operation.engProceedings paper10.1109/iedm50854.2024.10873388WOS:001692734400070