Generating Test Patterns for Chiplet Interconnects With Optimized Effectiveness and Efficiency

Chuang, Po-YaoPo-YaoChuangLorenzelli, FrancescoFrancescoLorenzelliWu, Cheng-WenCheng-WenWuMarinissen, Erik JanErik JanMarinissen2025-03-172025-03-172025-MAR0278-0070WOS:001440752000011https://imec-publications.be/handle/20.500.12860/45414Generating Test Patterns for Chiplet Interconnects With Optimized Effectiveness and EfficiencyJournal article10.1109/TCAD.2024.3466809WOS:001440752000011