A vertical Si/Si1-xGex heterojunction pMOSFET with reduced DIBL sensitivity, using a novel gate dielectric approach

Verheyen, P.P.VerheyenCollaert, NadineNadineCollaertCaymax, MattyMattyCaymaxLoo, RogerRogerLooDe Meyer, KristinKristinDe MeyerVan Rossum, MarcMarcVan Rossum2021-10-142021-10-141999https://imec-publications.be/handle/20.500.12860/4004A vertical Si/Si1-xGex heterojunction pMOSFET with reduced DIBL sensitivity, using a novel gate dielectric approachProceedings paper