A 69-dB SNDR 300-MS/s two-time interleaved pipelined SAR ADC in 16-nm CMOS FinFET with capacitive reference stabilization

Martens, EwoutEwoutMartensHershberg, BenjaminBenjaminHershbergCraninckx, JanJanCraninckx2021-10-252021-10-2520180018-9200https://imec-publications.be/handle/20.500.12860/31300A 69-dB SNDR 300-MS/s two-time interleaved pipelined SAR ADC in 16-nm CMOS FinFET with capacitive reference stabilizationJournal articlehttps://ieeexplore.ieee.org/document/8281465/