Sakui, KojiKojiSakuiGarbin, DanieleDanieleGarbinIwata, YoshihisaYoshihisaIwataGaddemane, GautamGautamGaddemaneLi, YisuoYisuoLiWan, YiqunYiqunWanKanazawa, KenichiKenichiKanazawaDemir, Eyup CanEyup CanDemirKunishima, IwaoIwaoKunishimaFantini, AndreaAndreaFantiniKakumu, MasakazuMasakazuKakumuLorant, ChristopheChristopheLorantHarada, NozomuNozomuHarada2026-05-112026-05-112025979-8-3503-6299-22330-7978https://imec-publications.be/handle/20.500.12860/59384Dynamic Flash Memory (DFM) have been fabricated on 300 mm SOI wafers with 65 nm technology, experimentally validating a wide "1" and "0" margin for the first time. The proposed device operates exclusively with positive polarity signals, eliminating the need for negative voltages. Thanks to its unique split-gate structure, a long retention time of over 10 seconds at 85 ℃, and a robust Bit Line (BL) disturbance time of 10 ms with the BL stress voltage (VSBL) of 2.5 V are demonstrated.engDynamic Flash Memory Operation Experimentally Validated with 65nm SOI TechnologyProceedings paper10.1109/imw61990.2025.11026959WOS:001556330300041