Van Beek, SimonSimonVan BeekCai, KaimingKaimingCaiYasin, FarrukhFarrukhYasinHody, HubertHubertHodyTalmelli, GiacomoGiacomoTalmelliNguyen, Van DaiVan DaiNguyenFranchina Vergel, NathaliNathaliFranchina VergelPalomino, A.A.PalominoTrovato, AnnaAnnaTrovatoWostyn, KurtKurtWostynRao, SiddharthSiddharthRaoKar, Gouri SankarGouri SankarKarCouet, SebastienSebastienCouet2026-05-042026-05-0420232380-9248https://imec-publications.be/handle/20.500.12860/59270We demonstrate, for the first time, the functionality of a scaled perpendicular spin-orbit torque (SOT)-MRAM where the SOT layer and magnetic tunnel junction (MTJ) pillar exhibit comparable dimensions. This novel design leads to a significant reduction in the power consumption (63% decrease), an enhancement in endurance (>1015 cycles), and a reduction in bit-cell area. Systematic investigations on device scaling are performed, highlighting the importance of SOT track scaling as a path to enhance the device performance by eliminating power consumption outside the MTJ pillar region. Furthermore, the hybrid free layer stack design offers a potential solution for scaling MTJ dimensions, as it enables low switching current and sufficient retention down to 20 nm.engProceedings paper10.1109/iedm45741.2023.10413749WOS:001693000200089