Double-patterning decomposition, design compliance, and verification algorithms at 32nm hp

Tritchkov, AlexAlexTritchkovGlotov, PetrPetrGlotovKomirenko, SergeySergeyKomirenkoSahouria, EmileEmileSahouriaTorres, AndresAndresTorresSeoud, AhmedAhmedSeoudWiaux, VincentVincentWiaux2021-10-172021-10-172008https://imec-publications.be/handle/20.500.12860/14580Double-patterning decomposition, design compliance, and verification algorithms at 32nm hpProceedings paper