200mm Reconstituted Wafer for Fan-out of Microfluidics and CMOS Electronics

Wei, WeiWeiWeiZhang, LeiLeiZhangTobback, BertBertTobbackVisker, JakobJakobViskerMalainou, AntoniaAntoniaMalainouStakenborg, TimTimStakenborgKarve, GauriGauriKarveSabuncuoglu Tezcan, DenizDenizSabuncuoglu Tezcan2026-05-282026-05-282024979-8-3315-2201-8https://imec-publications.be/handle/20.500.12860/59449Wafer reconstruction uses an embedded die method by putting separated chips from different sources on a shared silicon carrier [1]–[4]. This platform enables further processing on landing wafer as a regular 200mm substrate, which provides solution to fan-out both electronics and microfluidics. This paper describes the complete process on reconstructed wafer where we accomplish the combination of active chips and microfluidics structures. This work demonstrates the potential of wafer reconstruction as an integration process platform for life science applications.eng200mm Reconstituted Wafer for Fan-out of Microfluidics and CMOS ElectronicsProceedings paper10.1109/eptc62800.2024.10909847WOS:001479243200090