A Dynamic Reconfigurable Architecture for Hybrid Spiking and Convolutional FPGA-Based Neural Network Designs

Irmak, HasanHasanIrmakCorradi, FedericoFedericoCorradiDetterer, PaulPaulDettererAlachiotis, NikolaosNikolaosAlachiotisZiener, DanielDanielZiener2022-02-072021-11-022022-02-0720212079-9268WOS:000702371900001https://imec-publications.be/handle/20.500.12860/37533A Dynamic Reconfigurable Architecture for Hybrid Spiking and Convolutional FPGA-Based Neural Network DesignsJournal article10.3390/jlpea11030032WOS:000702371900001