Design-Technology Co-Optimization of Sequential and Monolithic CFET as enabler of technology node beyond 2nm

Chehab, BilalBilalChehabRyckaert, JulienJulienRyckaertSchuddinck, PieterPieterSchuddinckWeckx, PieterPieterWeckxHoriguchi, NaotoNaotoHoriguchiMirabelli, GioeleGioeleMirabelliSpessot, AlessioAlessioSpessotNa, Myung HeeMyung HeeNa2022-03-162022-03-1620210277-786XWOS:000672647800007https://imec-publications.be/handle/20.500.12860/39456Design-Technology Co-Optimization of Sequential and Monolithic CFET as enabler of technology node beyond 2nmProceedings paper10.1117/12.2583395978-1-5106-4062-7WOS:000672647800007