Low temperature backside damascene processing on temporary carrier wafer targeting 7 mu m and 5 mu m pitch microbumps for N equal and greater than 2 die to wafer TCB stacking

Derakhshandeh, JaberJaberDerakhshandehBeyne, EricEricBeyneBeyer, GeraldGeraldBeyerCapuz, GiovanniGiovanniCapuzCherman, VladimirVladimirChermanDe Preter, IngeIngeDe PreterGerets, CarineCarineGeretsShafahian, EhsanEhsanShafahianKennes, KoenKoenKennesJamieson, GeraldineGeraldineJamiesonCochet, TomTomCochetWebers, TomasTomasWebersTobback, BertBertTobbackVan der Plas, GeertGeertVan der PlasLa Tulipe, Douglas CharlesDouglas CharlesLa TulipePhommahaxay, AlainAlainPhommahaxayMiller, AndyAndyMiller2023-02-232022-09-172023-02-2320220569-5503WOS:000848765300172https://imec-publications.be/handle/20.500.12860/40443Low temperature backside damascene processing on temporary carrier wafer targeting 7 mu m and 5 mu m pitch microbumps for N equal and greater than 2 die to wafer TCB stackingProceedings paper10.1109/ECTC51906.2022.00179978-1-6654-7943-1WOS:000848765300172