Cu Plating of Through-Si Vias for 3D-Stacked Integrated Circuits

Radisic, AlexAlexRadisicLuhn, OleOleLuhnSwinnen, BartBartSwinnenBender, HugoHugoBenderDrijbooms, ChrisChrisDrijboomsDoumen, GeertGeertDoumenKellens, KristofKristofKellensRuythooren, WouterWouterRuythoorenVereecken, PhilippePhilippeVereecken2021-10-182021-10-182009https://imec-publications.be/handle/20.500.12860/16069Cu Plating of Through-Si Vias for 3D-Stacked Integrated CircuitsProceedings paperhttp://www.mrs.org/s_mrs/sec_subscribe.asp?CID=16750&DID=231997&action=detail