Vermeersch, BjornBjornVermeerschMishra, SubratSubratMishraBrunion, MoritzMoritzBrunionZografos, OdysseasOdysseasZografosLofrano, MelinaMelinaLofranoOprins, HermanHermanOprinsMyers, JamesJamesMyersTokei, ZsoltZsoltTokeiHellings, GeertGeertHellings2026-04-222026-04-2220242380-9248https://imec-publications.be/handle/20.500.12860/59150Realistic workload-based CPU powermaps reveal that nonuniform dissipation majorly accentuates hotspots in BSPDN based designs. 1 μm -resolution temperature simulations of an 80-core server SoC show ~ 14°C penalties relative to FSPDN caused by interplay of extraneous thermal resis-tance (BEOL + wafer bonding) and BSPDN heat spreading. Mitigation strategies are proposed and quantified.engProceedings paper10.1109/iedm50854.2024.10873567WOS:001692734400249