Si1-xGex-channel PFETs: scalability, layout considerations and compatibility with other stress techniques

Eneman, GeertGeertEnemanHellings, GeertGeertHellingsMitard, JeromeJeromeMitardWitters, LiesbethLiesbethWittersYamaguchi, ShinpeiShinpeiYamaguchiGarcia Bardon, MarieMarieGarcia BardonChristie, PhillipPhillipChristieOrtolland, ClaudeClaudeOrtollandHikavyy, AndriyAndriyHikavyyFavia, PaolaPaolaFaviaBargallo Gonzalez, MireiaMireiaBargallo GonzalezSimoen, EddyEddySimoenCrupi, FeliceFeliceCrupiKobayashi, MasaharuMasaharuKobayashiFranco, JacopoJacopoFrancoTakeoka, ShinjiShinjiTakeokaKrom, RaymondRaymondKromBender, HugoHugoBenderLoo, RogerRogerLooClaeys, CorCorClaeysDe Meyer, KristinKristinDe MeyerHoffmann, Thomas Y.Thomas Y.Hoffmann2021-10-192021-10-192011https://imec-publications.be/handle/20.500.12860/18887Si1-xGex-channel PFETs: scalability, layout considerations and compatibility with other stress techniquesProceedings paper