A 9.1-12.7 GHz VCO in 28nm CMOS with a bottom-pinning bias technique for digital varactor stress reduction

Hershberg, BenjaminBenjaminHershbergRaczkowski, KubaKubaRaczkowskiVaesen, KristofKristofVaesenCraninckx, JanJanCraninckx2021-10-222021-10-222014https://imec-publications.be/handle/20.500.12860/23924A 9.1-12.7 GHz VCO in 28nm CMOS with a bottom-pinning bias technique for digital varactor stress reductionProceedings paperhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6942027