Insight into Latchup Risk in 28nm Planar Bulk Technology for Quantum Computing Applications

Serbulova, KaterynaKaterynaSerbulovaQiu, Zi-EnZi-EnQiuChen, Shih-HungShih-HungChenGrill, AlexanderAlexanderGrillKao, Kuo-HsingKuo-HsingKaoDe Boeck, JoJoDe BoeckGroeseneken, GuidoGuidoGroeseneken2024-09-192024-08-162024-09-192024979-8-3503-6977-91541-7026WOS:001229691100066https://imec-publications.be/handle/20.500.12860/44311Insight into Latchup Risk in 28nm Planar Bulk Technology for Quantum Computing ApplicationsProceedings paper10.1109/IRPS48228.2024.10529388979-8-3503-6976-2WOS:001229691100066CMOSBEHAVIOR