Templated DSA vias in sub-7 nm circuits: Design strategy and DSA-aware via decomposition

Karageorgos, IoannisIoannisKarageorgosRyckaert, JulienJulienRyckaertGronheid, RoelRoelGronheidTung, Maryann C.Maryann C.TungWong, H.-S. PhilipH.-S. PhilipWongKarageorgos, EvangelosEvangelosKarageorgosBekaert, JoostJoostBekaertVandenberghe, GeertGeertVandenbergheDehaene, WimWimDehaene2021-10-232021-10-232016-10https://imec-publications.be/handle/20.500.12860/26806Templated DSA vias in sub-7 nm circuits: Design strategy and DSA-aware via decompositionProceedings paper