Design-driven optimisation of a 90 nm RF CMOS process by use of elevated source/drain

Linten, DimitriDimitriLintenThijs, StevenStevenThijsJeamsaksiri, WutthinanWutthinanJeamsaksiriMahadeva Iyer, NatarajanNatarajanMahadeva IyerDe Heyn, VincentVincentDe HeynVassilev, VesselinVesselinVassilevGroeseneken, GuidoGuidoGroesenekenScholten, A.J.A.J.ScholtenBadenes, G.G.BadenesJurczak, GosiaGosiaJurczakDecoutere, StefaanStefaanDecoutereDonnay, StephaneStephaneDonnayWambacq, PietPietWambacq2021-10-152021-10-152003-09https://imec-publications.be/handle/20.500.12860/7810Design-driven optimisation of a 90 nm RF CMOS process by use of elevated source/drainProceedings paper