Cost-aware strength reduction for constant multiplication in VLIW processors

Lambrechts, AndyAndyLambrechtsRaghavan, PraveenPraveenRaghavanJayapala, MuraliMuraliJayapalaCatthoor, FranckyFranckyCatthoorVerkest, DiederikDiederikVerkest2021-10-172021-10-172008https://imec-publications.be/handle/20.500.12860/13982Cost-aware strength reduction for constant multiplication in VLIW processorsProceedings paper