Si-cap-free SiGe p-channel Fin FETS and gate-all-around transistors in a replacement metal gate Process: interface trap density reduction and performance improvement by high-pressure deuterium anneal

Mertens, HansHansMertensRitzenthaler, RomainRomainRitzenthalerArimura, HiroakiHiroakiArimuraFranco, JacopoJacopoFrancoSebaai, FaridFaridSebaaiHikavyy, AndriyAndriyHikavyyPawlak, BartekBartekPawlakMachkaoutsan, VladimirVladimirMachkaoutsanDevriendt, KatiaKatiaDevriendtTsvetanova, DianaDianaTsvetanovaMilenin, AlexeyAlexeyMileninWitters, LiesbethLiesbethWittersDangol, AnishAnishDangolVancoille, EricEricVancoilleBender, HugoHugoBenderBadaroglu, MustafaMustafaBadarogluHolsteyns, FrankFrankHolsteynsBarla, KathyKathyBarlaMocuta, DanDanMocutaHoriguchi, NaotoNaotoHoriguchiThean, AaronAaronThean2021-10-222021-10-222015https://imec-publications.be/handle/20.500.12860/25641Si-cap-free SiGe p-channel Fin FETS and gate-all-around transistors in a replacement metal gate Process: interface trap density reduction and performance improvement by high-pressure deuterium annealProceedings paperhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7223654