Vandemaele, MichielMichielVandemaeleKaczer, BenBenKaczerTyaginov, StanislavStanislavTyaginovBury, ErikErikBuryVaisman Chasin, AdrianAdrianVaisman ChasinFranco, JacopoJacopoFrancoMakarov, AlexanderAlexanderMakarovMertens, HansHansMertensHellings, GeertGeertHellingsGroeseneken, GuidoGuidoGroeseneken2022-02-142022-02-142022-03-27/https://imec-publications.be/handle/20.500.12860/38859Simulation Comparison of Hot-Carrier Degradation in Nanowire, Nanosheet and Forksheet FETsProceedings paperElectrical & electronic engineeringBorder traps, forksheet FETs, gate-all-around FETs, hot-carrier degradation, interface defects, nanosheet FETs, nanowire FETs, oxide defects, simulations, TCAD, trapping