Buried silicon-germanium pMOSFETs: experimental analysis in VLSI logic circuits under aggressive voltage scaling

Crupi, FeliceFeliceCrupiAlioto, MassimoMassimoAliotoFranco, JacopoJacopoFrancoMagnone, PaoloPaoloMagnoneKaczer, BenBenKaczerGroeseneken, GuidoGuidoGroesenekenMitard, JeromeJeromeMitardWitters, LiesbethLiesbethWittersHoffmann, Thomas Y.Thomas Y.Hoffmann2021-10-202021-10-2020121063-8210https://imec-publications.be/handle/20.500.12860/20514Buried silicon-germanium pMOSFETs: experimental analysis in VLSI logic circuits under aggressive voltage scalingJournal article