Selection of ferroelectric/high-k gate stack combination for optimized FeFET performance

Xu, ZhenZhenXuViapiana, MatteoMatteoViapianaKaczer, BenBenKaczerGoux, LudovicLudovicGouxGroeseneken, GuidoGuidoGroesenekenWouters, DirkDirkWouters2021-10-152021-10-152004https://imec-publications.be/handle/20.500.12860/9949Selection of ferroelectric/high-k gate stack combination for optimized FeFET performanceOral presentation