System exploration and technology demonstration of 3D Wafer-to-Wafer integrated STT-MRAM based caches for advanced Mobile SoCs

Perumkunnil, ManuManuPerumkunnilYasin, FarrukhFarrukhYasinRao, SiddharthSiddharthRaoSalahuddin, Shairfe MuhammadShairfe MuhammadSalahuddinMilojevic, DragomirDragomirMilojevicVan der Plas, GeertGeertVan der PlasRyckaert, JulienJulienRyckaertBeyne, EricEricBeyneFurnemont, ArnaudArnaudFurnemontKar, Gouri SankarGouri SankarKar2022-01-242021-12-062022-01-2420202380-9248WOS:000717011600155https://imec-publications.be/handle/20.500.12860/38540System exploration and technology demonstration of 3D Wafer-to-Wafer integrated STT-MRAM based caches for advanced Mobile SoCsProceedings paper10.1109/IEDM13553.2020.9372046978-1-7281-8888-1WOS:000717011600155