Pathfinding: A design methodology for fast exploration and optimization of 3D-stacked integrated circuits

Milojevic, DragomirDragomirMilojevicRadojcic, RikoRikoRadojcicCarpenter, R.R.CarpenterMarchal, PolPolMarchalVan der Plas, GeertGeertVan der Plas2021-10-182021-10-182009-10https://imec-publications.be/handle/20.500.12860/15863Pathfinding: A design methodology for fast exploration and optimization of 3D-stacked integrated circuitsProceedings paper