Characterisation, modelling and design of bond-wire interconnects for chip-package co-design

Chandrasekhar, ArunArunChandrasekharStoukatch, SergueiSergueiStoukatchBrebels, StevenStevenBrebelsBalachandran, JayaprakashJayaprakashBalachandranBeyne, EricEricBeyneDe Raedt, WalterWalterDe RaedtNauwelaers, BartBartNauwelaersPodddar, AnindyaAnindyaPodddar2021-10-152021-10-152003https://imec-publications.be/handle/20.500.12860/7305Characterisation, modelling and design of bond-wire interconnects for chip-package co-designProceedings paper