High performance raised gate/source/drain transistors for sub-0.15 μm CMOS technologies

van Meer, HansHansvan MeerKubicek, StefanStefanKubicekLyu, Jeong-hoJeong-hoLyuCaymax, MattyMattyCaymaxLoo, RogerRogerLooDe Meyer, KristinKristinDe Meyer2021-10-142021-10-141999https://imec-publications.be/handle/20.500.12860/3936High performance raised gate/source/drain transistors for sub-0.15 μm CMOS technologiesProceedings paper