Anunciado, RoyRoyAnunciadoNechaev, KonstantinKonstantinNechaevvan Mierlo, WillemWillemvan MierloGuzella, ThiagoThiagoGuzellaHsia, JeffJeffHsiaSchoofs, StijnStijnSchoofsSchelcher, GuillaumeGuillaumeSchelcherVan Der Sanden, StefanStefanVan Der Sanden2026-09-142026-09-142026979-8-3315-8051-31078-8743https://imec-publications.be/handle/20.500.12860/60359This work presents a simulation-driven pattern classification methodology tailored for multi-layer logic device applications. Leveraging aerial image data of both line-space and contact hole patterns, we demonstrate the approach on a two-layer stack. The methodology integrates data science techniques to extract and cluster similar patterns, enabling the identification of EPE-critical pattern groups. These critical pattern groups provide valuable insights for lithography process setup, inline monitoring, and advanced process control strategies.engUnsupervised Pattern Classification for Dual-Layer EPE Characterization in Advanced Logic DevicesProceedings paper10.1109/asmc69324.2026.11551176WOS:001813326200007