Eneman, GeertGeertEnemanWitters, LiesbethLiesbethWittersCollaert, NadineNadineCollaertMitard, JeromeJeromeMitardHellings, GeertGeertHellingsYamaguchi, ShinpeiShinpeiYamaguchiDe Keersgieter, AnAnDe KeersgieterHikavyy, AndriyAndriyHikavyyVincent, BenjaminBenjaminVincentFavia, PaolaPaolaFaviaBender, HugoHugoBenderVeloso, AnabelaAnabelaVelosoChiarella, ThomasThomasChiarellaTogo, MitsuhiroMitsuhiroTogoLoo, RogerRogerLooDe Meyer, KristinKristinDe MeyerMercha, AbdelkarimAbdelkarimMerchaHoriguchi, NaotoNaotoHoriguchiThean, AaronAaronThean2021-10-202021-10-202012https://imec-publications.be/handle/20.500.12860/20654Stress techniques in advanced transistor architectures: bulk FinFETs and implant-free quantum well transistorsProceedings paper