System-Level Simulation of Electromigration in a 3 nm CMOS Power Delivery Network: The Effect of Grid Redundancy, Metallization Stack and Standard-Cell Currents

Zahedmanesh, HoumanHoumanZahedmaneshCiofi, IvanIvanCiofiZografos, OdysseasOdysseasZografosCroes, KristofKristofCroesBadaroglu, MustafaMustafaBadaroglu2023-06-132023-02-272023-06-1320221541-7026WOS:000922926400087https://imec-publications.be/handle/20.500.12860/41152System-Level Simulation of Electromigration in a 3 nm CMOS Power Delivery Network: The Effect of Grid Redundancy, Metallization Stack and Standard-Cell CurrentsProceedings paper10.1109/IRPS48227.2022.9764511978-1-6654-7950-9WOS:000922926400087