Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node

Gupta, AnshulAnshulGuptaMertens, HansHansMertensTao, ZhengZhengTaoDemuynck, StevenStevenDemuynckBoemmels, JuergenJuergenBoemmelsArutchelvan, GouthamGouthamArutchelvanDevriendt, KatiaKatiaDevriendtVarela Pedreira, OlallaOlallaVarela PedreiraRitzenthaler, RomainRomainRitzenthalerWang, ShouhuaShouhuaWangRadisic, DunjaDunjaRadisicKenis, KarineKarineKenisTeugels, LieveLieveTeugelsSebaai, FaridFaridSebaaiLorant, ChristopheChristopheLorantJourdan, NicolasNicolasJourdanChan, BTBTChanZahedmanesh, HoumanHoumanZahedmaneshSubramanian, SujithSujithSubramanianSchleicher, FilipFilipSchleicherHopf, TobyTobyHopfPeter, AntonyAntonyPeterRassoul, NouredineNouredineRassoulDebruyn, HaroenHaroenDebruynDemonie, IngridIngridDemonieSiew, Yong KongYong KongSiewChiarella, ThomasThomasChiarellaBriggs, BasoeneBasoeneBriggsZhou, DaisyDaisyZhouRosseel, ErikErikRosseelDe Keersgieter, AnAnDe KeersgieterCapogreco, ElenaElenaCapogrecoDentoni Litta, EugenioEugenioDentoni LittaBoccardi, GuillaumeGuillaumeBoccardiBaudot, SylvainSylvainBaudotMannaert, GeertGeertMannaertBontemps, N.N.BontempsSepulveda Marquez, AlfonsoAlfonsoSepulveda MarquezMertens, SofieSofieMertensKim, Min SooMin SooKimDupuy, EmmanuelEmmanuelDupuyVandersmissen, KevinKevinVandersmissenPaolillo, SaraSaraPaolilloYakimets, DmitryDmitryYakimetsChehab, BilalBilalChehabFavia, PaolaPaolaFaviaDrijbooms, ChrisChrisDrijboomsCousserier, JorisJorisCousserierJaysankar, ManojManojJaysankarLazzarino, FredericFredericLazzarinoMorin, PierrePierreMorinAltamirano Sanchez, EfrainEfrainAltamirano SanchezMitard, JeromeJeromeMitardWilson, ChrisChrisWilsonHolsteyns, FrankFrankHolsteynsTokei, ZsoltZsoltTokeiHoriguchi, NaotoNaotoHoriguchi2021-12-152021-11-022021-12-1520200743-1562WOS:000668063000097https://imec-publications.be/handle/20.500.12860/37742Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm NodeProceedings paper978-1-7281-6460-1WOS:000668063000097