Characterization and otimalization of 65nm CMOS technology using scanning spreading resistance microscopy

Eyben, PierrePierreEybenDe Keersgieter, AnAnDe KeersgieterChramtsov, I.I.ChramtsovFouchier, M.M.FouchierJanssens, TomTomJanssensVandervorst, WilfriedWilfriedVandervorst2021-10-162021-10-162005https://imec-publications.be/handle/20.500.12860/10444Characterization and otimalization of 65nm CMOS technology using scanning spreading resistance microscopyMeeting abstract