Low Vt Ni-FUSI CMOS technology using a DyO cap layer with either single or dual Ni-phases

Yu, HongYuHongYuYuChang, Shou-ZenShou-ZenChangVeloso, AnabelaAnabelaVelosoLauwers, AnneAnneLauwersAdelmann, ChristophChristophAdelmannOnsia, BartBartOnsiaVan Elshocht, SvenSvenVan ElshochtSinganamalla, RaghunathRaghunathSinganamallaDemand, MarcMarcDemandVos, RitaRitaVosKauerauf, ThomasThomasKaueraufBrus, StephanStephanBrusShi, XiaopingXiaopingShiKubicek, StefanStefanKubicekVrancken, ChristaChristaVranckenMitsuhashi, RiichirouRiichirouMitsuhashiLehnen, PeerPeerLehnenKittl, JorgeJorgeKittlNiwa, M.M.NiwaYin, K.M.K.M.YinHoffmann, ThomasThomasHoffmannDe Gendt, StefanStefanDe GendtJurczak, GosiaGosiaJurczakAbsil, PhilippePhilippeAbsilBiesemans, SergeSergeBiesemans2021-10-162021-10-162007https://imec-publications.be/handle/20.500.12860/13250Low Vt Ni-FUSI CMOS technology using a DyO cap layer with either single or dual Ni-phasesProceedings paper