Performance and electrostatic improvement by high-pressure anneal on Si-passivated strained Ge pFinFET and gate all around devices with superior NBTI reliability

Arimura, HiroakiHiroakiArimuraWitters, LiesbethLiesbethWittersCott, DaireDaireCottDekkers, HaroldHaroldDekkersLoo, RogerRogerLooMitard, JeromeJeromeMitardRagnarsson, Lars-AkeLars-AkeRagnarssonWostyn, KurtKurtWostynBoccardi, GuillaumeGuillaumeBoccardiChiu, EddieEddieChiuSubirats, AlexandreAlexandreSubiratsFavia, PaolaPaolaFaviaVancoille, EricEricVancoilleDe Heyn, VincentVincentDe HeynMocuta, DanDanMocutaCollaert, NadineNadineCollaert2021-10-242021-10-242017https://imec-publications.be/handle/20.500.12860/27762Performance and electrostatic improvement by high-pressure anneal on Si-passivated strained Ge pFinFET and gate all around devices with superior NBTI reliabilityProceedings paperhttp://ieeexplore.ieee.org/document/7998169/