Buried power rails and back-side power grids: ARM CPU power delivery network design beyond 5nm

Prasad, D.D.PrasadNibhanupudi, S.S.NibhanupudiDas, S.S.DasZografos, OdysseasOdysseasZografosChehab, BilalBilalChehabSarkar, SatadruSatadruSarkarBaert, RogierRogierBaertRobinson, A.A.RobinsonGupta, AnshulAnshulGuptaSpessot, AlessioAlessioSpessotDebacker, PeterPeterDebackerVerkest, DiederikDiederikVerkestKulkarni, J.J.KulkarniCline, B.B.ClineSinha, S.S.Sinha2021-10-272021-10-272019https://imec-publications.be/handle/20.500.12860/33822Buried power rails and back-side power grids: ARM CPU power delivery network design beyond 5nmProceedings paper