Optimized process simulation of USJ for HKMG DRAM periphery transistors

Spessot, AlessioAlessioSpessotCaillat, ChristianChristianCaillatRitzenthaler, RomainRomainRitzenthalerSchram, TomTomSchramFazan, PierrePierreFazan2021-10-222021-10-222014https://imec-publications.be/handle/20.500.12860/24557Optimized process simulation of USJ for HKMG DRAM periphery transistorsProceedings paperhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=6818722&queryText%3DUSJ+for+HKMG+DRAM+periphery+transistors