Design space exploration of all-digital symbol timing adjustment architectures

Vernalde, SergeSergeVernaldeSchaumont, PatrickPatrickSchaumontEngels, MarcMarcEngelsBolsens, IvoIvoBolsens2021-09-292021-09-291996https://imec-publications.be/handle/20.500.12860/1637Design space exploration of all-digital symbol timing adjustment architecturesProceedings paper