Modeling the effect of charges in the back side passivation layer on through silicon via (TSV) capacitance after wafer thinning

Rack, MartinMartinRackStucchi, MicheleMicheleStucchiSun, XiaoXiaoSunRoda Neve, CesarCesarRoda NeveVan der Plas, GeertGeertVan der PlasBeyne, EricEricBeyneAbsil, PhilippePhilippeAbsilRaskin, J-PJ-PRaskin2021-10-222021-10-222015https://imec-publications.be/handle/20.500.12860/25787Modeling the effect of charges in the back side passivation layer on through silicon via (TSV) capacitance after wafer thinningProceedings paperhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7167022