Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages

Chuang, Po-YaoPo-YaoChuangLorenzelli, FrancescoFrancescoLorenzelliChakravarty, SreejitSreejitChakravartyBoutobza, SlimaneSlimaneBoutobzaWu, Cheng-WenCheng-WenWuGielen, GeorgesGeorgesGielenMarinissen, Erik JanErik JanMarinissen2024-04-042023-08-102023-08-162024-04-0420232164-0157WOS:001021364700027https://imec-publications.be/handle/20.500.12860/42313Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based PackagesProceedings paper10.1109/3DIC57175.2023.10154900979-8-3503-1137-2WOS:001021364700027