Engineering the IIIV gate stack properties by optimization of the ALD process

Sioncke, SonjaSonjaSionckeIvanov, TsvetanTsvetanIvanovLin, DennisDennisLinFranco, JacopoJacopoFrancoVais, AbhitoshAbhitoshVaisAmeen, MahmoudMahmoudAmeenDelabie, AnneliesAnneliesDelabieXie, QiQiXieMaes, JanJanMaesGivens, MichaelMichaelGivensTang, FuFuTangVan Elshocht, SvenSvenVan ElshochtHolsteyns, FrankFrankHolsteynsBarla, KathyKathyBarlaCollaert, NadineNadineCollaertThean, AaronAaronTheanDe Gendt, StefanStefanDe GendtHeyns, MarcMarcHeyns2021-10-222021-10-222014https://imec-publications.be/handle/20.500.12860/24537Engineering the IIIV gate stack properties by optimization of the ALD processMeeting abstracthttp://ma.ecsdl.org/content/MA2014-02/30/1613.abstract